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Enet Certified Testing for Memory Module
We want to make it perfect. Even all our inventory which are all passed manufacture quality control, but like everything else in life, nothing are perfect originally.
To minimize the chances for dead-on-arrival (DOA), you may have us test your goods before shipping. Our testing solution will run 2 different test with the goods you purchase. Please read the testing details below on how we handle the testing.
Benefits: (1) You avoid the hassle and consequences of DOA. If this option is paid before shipping, we guarantee no DOA for 30 days after you receiving the product.(2) We'll pay for the return shipping for the defective product if it becomes defective in 30 days. Normally customers are responsible for returning defective products including DOA. With this option, you may save the return shipping.
Note: Paid testing does not guarantee the item to work in all situations since it may not address some specific issues such as hardware and software compatibility. Please understand that we must open the original packages to do the testing. The testing cover only manufacturer's defect and it does NOT cover damages due to shipping, user error or incompatibility.
Testing Step 1: VERSA V Tester
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* Run 9 AC memory test patterns (electrical, march, and base cell types), along with an option to perform aging on the module before the test, and run several loops of the same test list
* Open/Shorts test checks control/address/data lines; variable tRCD, tCL, VCC, refresh time, and data values for each AC pattern; DC operating conditions can also be simulated
* Module SPD verification for compatibility on the system |
Testing Step 2: Memtest86 Testing Program
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* Memtest86 is thorough, stand alone memory test for x86 architecture computers. BIOS based memory tests are a quick, cursory check and often miss many of the failures that are detected by Memtest86.
* Memory Testing Philosophy
There are many good approaches for testing memory. However, many tests simply throw some patterns at memory without much thought or knowledge of the memory architecture or how errors can best be detected. This works fine for hard memory failures but does little to find intermittent errors. BIOS based memory tests are useless for finding intermittent memory errors.
* Memory chips consist of a large array of tightly packed memory cells, one for each bit of data. The vast majority of the intermittent failures are a result of interaction between these memory cells. Often writing a memory cell can cause one of the adjacent cells to be written with the same data. An effective memory test attempts to test for this condition. Therefore, an ideal strategy for testing memory would be the following:
1) write a cell with a zero
2) write all of the adjacent cells with a one, one or more times
3) check that the first cell still has a zero |
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